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ISL5416
NOTES ON LOADING AND READING THE RANGE CONTROL ACCUMULATOR:
Master Bus -> Holding Register -> Accumulator -> Holding Register
The accumulator is 17 bits. The lower 16 bits are loaded from the micro-processor interface master register into a holding register.
The MSB of the input holding register is always zero. The accumulator is loaded from the holding register. When the accumulator is
read, the most significant 16 accumulator bits are returned (the LSB of the accumulator is not read).
TABLE 42.
ACCUMULATOR
MASTER
IWA = 0*19h
IWA = 0*1Bh
16:0
15:0
Z, 15:0
16:1
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Range Control bit weights are listed in Table 85 in the back
of the data sheet.
TABLE 43. LEAK FACTOR (BIAS) (IWA = 0*16h) RESET STATE = 0x00000000h THIS CONTROL IS SHARED FOR AIN/BIN AND FOR
CIN/DIN
P(31:0)
31:16
15:0
P(31:0)
31:24
23:16
15:8
7:0
P(31:0)
31:24
23:16
15:8
7:0
P(31:0)
31:16
FUNCTION
UNUSED.
LEAK FACTOR.
This signed value is added to the attenuator control register if the average input magnitude is between the upper and lower thresholds
when updates are enabled (at the end of integration)
S [ S -1 . . . -15 ] into the 17-bit accumulator. MSB of 16 programmable bits (S) has a weight of -24 dB.
TABLE 44. GAIN MAPPING LOOK-UP TABLE REGISTER 1 (IWA = 0*17h) RESET STATE = 0x00000000h
FUNCTION
ATTENUATION CODE 3 (18 dB code). 8 bit output code when the attenuation register MSBs = 011b. See output E routing control
for bit to pin mapping.
ATTENUATION CODE 2 (12 dB code). 8 bit output code when the attenuation register MSBs = 010b. See output E routing control
for bit to pin mapping.
ATTENUATION CODE 1 (6 dB code). 8 bit output code when the attenuation register MSBs = 001b. See output E routing control for
bit to pin mapping.
ATTENUATION CODE 0 (0 dB code). 8 bit output code when the attenuation register MSBs = 000b. See output E routing control for
bit to pin mapping.
TABLE 45. GAIN MAPPING LOOK-UP TABLE REGISTER 2 (IWA = 0*18h) RESET STATE = 0x00000000h
FUNCTION
ATTENUATION CODE 7 (42 dB code). 8 bit output code when the attenuation register MSBs = 111b. See output E routing control
for bit to pin mapping.
ATTENUATION CODE 6 (36 dB code). 8 bit output code when the attenuation register MSBs = 110b. See output E routing control
for bit to pin mapping.
ATTENUATION CODE 5 (30 dB code). 8 bit output code when the attenuation register MSBs = 101b. See output E routing control
for bit to pin mapping.
ATTENUATION CODE 4 (24 dB code). 8 bit output code when the attenuation register MSBs = 100b. See output E routing control
for bit to pin mapping.
TABLE 46. μ P ATTENUATOR CONTROL ACCUMULATOR LOAD (IWA = 0*19h) RESET STATE = 0x00000000h
FUNCTION
RESERVED. Set to 0.
45
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